1. Field of the Invention
The invention relates in general to a data memory controller, and more particularly, to a data memory controller to support data bus invert (DBI).
2. Description of the Related Art
As the computer has become a part of daily life, and more and more technologically advanced, its electrical demands are heavier and heavier. Reducing the power consumption of computers has become a very important topic.
A power saving method has been proposed in IEEE transactions on very large scale integrated (VLSI) systems, Vol. 3, No. 1, March 1995. This method applies the data bus invert mechanism. In U.S. Pat. No. 6,046,943, an output circuit for reducing data conversion is further developed, wherein the DBI is used to compare each bit of the current data and the previous data, and if it has half the number of total bits in difference over then an invert is taken and the DBI bit is set to be 1, simultaneously. However, if the data transmission does not support DBI function in transmitting memory data to the central processing unit (CPU), the bus state is often altered (from 1 to 0 or from 0 to 1), and more power is consumed.
For a personal computer, the north bridge functions as an interface between the central processing unit and the system memory (normally DRAM). The operation frequency for the current memory is much slower than the operation frequency of the central processing unit. Therefore, if the time margin of the chip set for processing the memory data can be enlarged, the signal process can be more precise.